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authorXinliang Liu <xinliang.liu@linaro.org>2016-06-20 05:50:04 +0200
committerPhilipp Zabel <p.zabel@pengutronix.de>2016-06-29 23:39:08 +0200
commit50f44e894ad06eb8b401308c3cfe5bceaaa26df2 (patch)
tree6f229c9527c4ed43d71a59b653b2ebef5961b4ff /Documentation
parentdt-bindings: reset: Add bindings for the Meson SoC Reset Controller (diff)
downloadlinux-50f44e894ad06eb8b401308c3cfe5bceaaa26df2.tar.xz
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reset: hisilicon: Add media reset controller binding
Add compatible for media reset controller. Actually, there are two reset controllers in hi6220 SoC: The peripheral reset controller bits are part of sysctrl registers. The media reset controller bits are part of mediactrl registers. So for the compatible part, it should contain "syscon" for both peripheral and media reset controller. Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt4
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
index e0b185a944ba..c25da39df707 100644
--- a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
+++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
@@ -8,7 +8,9 @@ The reset controller registers are part of the system-ctl block on
hi6220 SoC.
Required properties:
-- compatible: may be "hisilicon,hi6220-sysctrl"
+- compatible: should be one of the following:
+ - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.
+ - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.
- reg: should be register base and length as documented in the
datasheet
- #reset-cells: 1, see below