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author | Jordan Crouse <jcrouse@codeaurora.org> | 2019-04-19 21:56:27 +0200 |
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committer | Rob Clark <robdclark@chromium.org> | 2019-04-21 16:36:54 +0200 |
commit | 026ef6354caa661ddd4c399590048e72a9d420bf (patch) | |
tree | cde3d378076106ad3ddda77936de40fcb5365bf7 /Documentation | |
parent | drm/msm: Split submit_lookup_objects() into two loops (diff) | |
download | linux-026ef6354caa661ddd4c399590048e72a9d420bf.tar.xz linux-026ef6354caa661ddd4c399590048e72a9d420bf.zip |
dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU
Add documentation for the interconnect and interconnect-names bindings
for the GPU node as detailed by bindings/interconnect/interconnect.txt.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/display/msm/gpu.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt index aad1aef682f7..c04614c63ea9 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.txt +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt @@ -22,6 +22,8 @@ Required properties: - qcom,adreno-630.2 - iommus: optional phandle to an adreno iommu instance - operating-points-v2: optional phandle to the OPP operating points +- interconnects: optional phandle to an interconnect provider. See + ../interconnect/interconnect.txt for details. - qcom,gmu: For GMU attached devices a phandle to the GMU device that will control the power for the GPU. Applicable targets: - qcom,adreno-630.2 @@ -70,6 +72,8 @@ Example a6xx (with GMU): operating-points-v2 = <&gpu_opp_table>; + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>; + qcom,gmu = <&gmu>; }; }; |