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authorMesih Kilinc <mesihkilinc@gmail.com>2019-02-11 10:21:07 +0100
committerDaniel Lezcano <daniel.lezcano@linaro.org>2019-05-02 21:55:58 +0200
commit67d06e6efa41c4135cfc4c4c5c9b55d5e3a9b6f7 (patch)
treee3ef800c46c96faa25c0de036904fb1ffca2c8d7 /Documentation
parenttick: Fix typos in comments (diff)
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dt-bindings: timer: Add Allwinner suniv timer
Add compatible string for Allwinner suniv timer which is similar to sun4i timer. Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt4
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
index 5c2e23574ca0..3da9d515c03a 100644
--- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
+++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
@@ -2,7 +2,9 @@ Allwinner A1X SoCs Timer Controller
Required properties:
-- compatible : should be "allwinner,sun4i-a10-timer"
+- compatible : should be one of the following:
+ "allwinner,sun4i-a10-timer"
+ "allwinner,suniv-f1c100s-timer"
- reg : Specifies base physical address and size of the registers.
- interrupts : The interrupt of the first timer
- clocks: phandle to the source clock (usually a 24 MHz fixed clock)