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| author | Alexander Duyck <alexander.h.duyck@intel.com> | 2012-09-13 08:28:11 +0200 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2012-09-22 12:01:00 +0200 |
| commit | 797fd4be7b6968ea752ae47367ae95454124a698 (patch) | |
| tree | 8aa173ed6f531993398581279dbe72e4092d9448 /Documentation | |
| parent | igb: Change Tx cleanup loop to do/while instead of for (diff) | |
| download | linux-797fd4be7b6968ea752ae47367ae95454124a698.tar.xz linux-797fd4be7b6968ea752ae47367ae95454124a698.zip | |
igb: Change how we populate the RSS indirection table
This patch cleans up our RSS indirection table configuration so that we
generate the same table regardless of CPU endianness. In addition it
changes the table setup so that instead of doing a modulo based setup it is
instead a divisor based setup. The advantage to this is that we should be
able to take the Rx hash and compute the Rx queue with very little CPU
overhead if needed.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions