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| author | Marc Zyngier <marc.zyngier@arm.com> | 2019-05-23 12:24:50 +0200 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2019-05-23 16:40:30 +0200 |
| commit | a5325089bd05a7b0259cc4038479d36308edbda2 (patch) | |
| tree | 253c14c201d292126e4166f88b397642cdedd90c /Documentation | |
| parent | arm64/module: deal with ambiguity in PRELxx relocation ranges (diff) | |
| download | linux-a5325089bd05a7b0259cc4038479d36308edbda2.tar.xz linux-a5325089bd05a7b0259cc4038479d36308edbda2.zip | |
arm64: Handle erratum 1418040 as a superset of erratum 1188873
We already mitigate erratum 1188873 affecting Cortex-A76 and
Neoverse-N1 r0p0 to r2p0. It turns out that revisions r0p0 to
r3p1 of the same cores are affected by erratum 1418040, which
has the same workaround as 1188873.
Let's expand the range of affected revisions to match 1418040,
and repaint all occurences of 1188873 to 1418040. Whilst we're
there, do a bit of reformating in silicon-errata.txt and drop
a now unnecessary dependency on ARM_ARCH_TIMER_OOL_WORKAROUND.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/arm64/silicon-errata.txt | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt index b29a32805ad0..2735462d5958 100644 --- a/Documentation/arm64/silicon-errata.txt +++ b/Documentation/arm64/silicon-errata.txt @@ -58,14 +58,14 @@ stable kernels. | ARM | Cortex-A72 | #853709 | N/A | | ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 | | ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 | -| ARM | Cortex-A76 | #1188873 | ARM64_ERRATUM_1188873 | +| ARM | Cortex-A76 | #1188873,1418040| ARM64_ERRATUM_1418040 | | ARM | Cortex-A76 | #1165522 | ARM64_ERRATUM_1165522 | | ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 | -| ARM | Neoverse-N1 | #1188873 | ARM64_ERRATUM_1188873 | | ARM | Cortex-A76 | #1463225 | ARM64_ERRATUM_1463225 | -| ARM | MMU-500 | #841119,#826419 | N/A | +| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 | +| ARM | MMU-500 | #841119,826419 | N/A | | | | | | -| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 | +| Cavium | ThunderX ITS | #22375,24313 | CAVIUM_ERRATUM_22375 | | Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 | | Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 | | Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 | |