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authorPurna Chandra Mandal <purna.mandal@microchip.com>2016-02-26 18:20:21 +0100
committerRalf Baechle <ralf@linux-mips.org>2016-05-13 14:02:12 +0200
commitbfa43267bc1c6484fe63570774c381ddc7b32f40 (patch)
treede9bc298e41a57e94af79eeab1d5b22af8f02938 /Documentation
parentwatchdog: pic32-wdt: Add PIC32 watchdog driver (diff)
downloadlinux-bfa43267bc1c6484fe63570774c381ddc7b32f40.tar.xz
linux-bfa43267bc1c6484fe63570774c381ddc7b32f40.zip
dt/bindings: Add bindings for PIC32 deadman timer peripheral
Document the devicetree bindings for the deadman timer peripheral found on Microchip PIC32 SoC class devices. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: Guenter Roeck <linux@roeck-us.net> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-watchdog@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12702/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt19
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diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
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+* Microchip PIC32 Deadman Timer
+
+The deadman timer is used to reset the processor in the event of a software
+malfunction. It is a free-running instruction fetch timer, which is clocked
+whenever an instruction fetch occurs until a count match occurs.
+
+Required properties:
+- compatible: must be "microchip,pic32mzda-dmt".
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- clocks: phandle of parent clock (should be &PBCLK7).
+
+Example:
+
+ watchdog@1f800a00 {
+ compatible = "microchip,pic32mzda-dmt";
+ reg = <0x1f800a00 0x80>;
+ clocks = <&PBCLK7>;
+ };