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| author | Vignesh R <vigneshr@ti.com> | 2017-10-03 07:19:20 +0200 |
|---|---|---|
| committer | Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> | 2017-10-17 20:37:20 +0200 |
| commit | 18a3dde9db78076755275423b754846a2da000ad (patch) | |
| tree | b07263770a7dcec6ca68bd57fe07cbc08ebaf4b4 /Documentation | |
| parent | spi-nor: intel-spi: Fall back to use SW sequencer to erase (diff) | |
| download | linux-18a3dde9db78076755275423b754846a2da000ad.tar.xz linux-18a3dde9db78076755275423b754846a2da000ad.zip | |
mtd: spi-nor: cadence-quadspi: Add TI 66AK2G SoC specific compatible
Update binding documentation to add a new compatible for TI 66AK2G SoC,
to handle TI SoC specific quirks in the driver.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt index f248056da24c..7dbe3bd9ac56 100644 --- a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt @@ -1,7 +1,9 @@ * Cadence Quad SPI controller Required properties: -- compatible : Should be "cdns,qspi-nor". +- compatible : should be one of the following: + Generic default - "cdns,qspi-nor". + For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor". - reg : Contains two entries, each of which is a tuple consisting of a physical address and length. The first entry is the address and length of the controller register set. The second entry is the |