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| author | Dylan Reid <dgreid@chromium.org> | 2014-05-20 04:18:27 +0200 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2014-05-20 09:38:38 +0200 |
| commit | 3c320f3f5649667874d754e59bdd84dab185fe04 (patch) | |
| tree | 30eddddabb1fbbc34c464dee7e454886780dcb4f /Documentation | |
| parent | ALSA: hda/hdmi - Add Nvidia Tegra124 HDMI support (diff) | |
| download | linux-3c320f3f5649667874d754e59bdd84dab185fe04.tar.xz linux-3c320f3f5649667874d754e59bdd84dab185fe04.zip | |
ALSA: hda - Add driver for Tegra SoC HDA
This adds a driver for the HDA block in Tegra SoCs. The HDA bus is
used to communicate with the HDMI codec on Tegra124.
Most of the code is re-used from the Intel/PCI HDA driver. It brings
over only two of the module params, power_save and probe_mask.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt new file mode 100644 index 000000000000..c26f8ca97023 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt @@ -0,0 +1,28 @@ +NVIDIA Tegra30 HDA controller + +Required properties: +- compatible : "nvidia,tegra30-hda" +- reg : Should contain the HDA registers location and length. +- interrupts : The interrupt from the HDA controller. +- clocks : Must contain an entry for each required entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names : Must include the following entries: hda, hdacodec_2x, hda2hdmi +- resets : Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names : Must include the following entries: hda, hdacodec_2x, hda2hdmi + +Example: + +hda@0,70030000 { + compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda"; + reg = <0x0 0x70030000 0x0 0x10000>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_HDA>, + <&tegra_car TEGRA124_CLK_HDA2HDMI>, + <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; + clock-names = "hda", "hda2hdmi", "hdacodec_2x"; + resets = <&tegra_car 125>, /* hda */ + <&tegra_car 128>; /* hda2hdmi */ + <&tegra_car 111>, /* hda2codec_2x */ + reset-names = "hda", "hda2hdmi", "hdacodec_2x"; +}; |