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| author | Tero Kristo <t-kristo@ti.com> | 2018-02-15 08:44:52 +0100 |
|---|---|---|
| committer | Tero Kristo <t-kristo@ti.com> | 2018-03-08 10:42:04 +0100 |
| commit | be02637f6b741875aa0779c35f31591738aa2cd9 (patch) | |
| tree | 8eedafd5739140f1dc6212b817b0c3496c3e9cd8 /Documentation | |
| parent | Linux 4.16-rc1 (diff) | |
| download | linux-be02637f6b741875aa0779c35f31591738aa2cd9.tar.xz linux-be02637f6b741875aa0779c35f31591738aa2cd9.zip | |
dt-bindings: clock: ti: add latching support to mux and divider clocks
Certain hardware configurations, like dra76x, have some of the clock
registers partitioned in a funky manner that requires the clock
control setup to be latched for PRCM to be notified of the change. This
is accomplished with a separate control bit under the register. Add
support for this clock latching support to divider and mux clocks.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/ti/divider.txt | 3 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/clock/ti/mux.txt | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/ti/divider.txt b/Documentation/devicetree/bindings/clock/ti/divider.txt index 35a6f5c7e5c2..9b13b32974f9 100644 --- a/Documentation/devicetree/bindings/clock/ti/divider.txt +++ b/Documentation/devicetree/bindings/clock/ti/divider.txt @@ -75,6 +75,9 @@ Optional properties: - ti,invert-autoidle-bit : autoidle is enabled by setting the bit to 0, see [2] - ti,set-rate-parent : clk_set_rate is propagated to parent +- ti,latch-bit : latch the divider value to HW, only needed if the register + access requires this. As an example dra76x DPLL_GMAC H14 divider implements + such behavior. Examples: dpll_usb_m2_ck: dpll_usb_m2_ck@4a008190 { diff --git a/Documentation/devicetree/bindings/clock/ti/mux.txt b/Documentation/devicetree/bindings/clock/ti/mux.txt index 2d0d170f8001..eec8994b9be8 100644 --- a/Documentation/devicetree/bindings/clock/ti/mux.txt +++ b/Documentation/devicetree/bindings/clock/ti/mux.txt @@ -48,6 +48,9 @@ Optional properties: zero - ti,set-rate-parent : clk_set_rate is propagated to parent clock, not supported by the composite-mux-clock subtype +- ti,latch-bit : latch the mux value to HW, only needed if the register + access requires this. As an example, dra7x DPLL_GMAC H14 muxing + implements such behavior. Examples: |