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authorIngo Molnar <mingo@elte.hu>2009-06-04 16:33:00 +0200
committerIngo Molnar <mingo@elte.hu>2009-06-04 16:33:00 +0200
commit20c84e959ec11b1803d2b2832eef703d5fbe7f7b (patch)
tree92d53a1060f301391faa3f43194e1d34f3920665 /Documentation
parentperf report: Bail out if there are unrecognized options/arguments (diff)
downloadlinux-20c84e959ec11b1803d2b2832eef703d5fbe7f7b.tar.xz
linux-20c84e959ec11b1803d2b2832eef703d5fbe7f7b.zip
perf stat: Update help text
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/perf_counter/Documentation/perf-stat.txt30
1 files changed, 19 insertions, 11 deletions
diff --git a/Documentation/perf_counter/Documentation/perf-stat.txt b/Documentation/perf_counter/Documentation/perf-stat.txt
index a67d0e3b7d0d..a340e7be83dd 100644
--- a/Documentation/perf_counter/Documentation/perf-stat.txt
+++ b/Documentation/perf_counter/Documentation/perf-stat.txt
@@ -22,6 +22,7 @@ OPTIONS
<command>...::
Any command you can specify in a shell.
+
-e::
--event=::
0:0: cpu-cycles
@@ -45,6 +46,13 @@ OPTIONS
1:4: migrations
rNNN: raw PMU events (eventsel+umask)
+-i::
+--inherit::
+ child tasks inherit counters
+-p::
+--pid=<pid>::
+ stat events on existing pid
+
-a::
system-wide collection
@@ -54,20 +62,20 @@ OPTIONS
EXAMPLES
--------
-$ perf stat sleep 1
+$ perf stat -- make -j
- Performance counter stats for 'sleep':
+ Performance counter stats for 'make -j':
- 0.678356 task clock ticks (msecs)
- 7 context switches (events)
- 4 CPU migrations (events)
- 232 pagefaults (events)
- 1810403 CPU cycles (events)
- 946759 instructions (events)
- 18952 cache references (events)
- 4885 cache misses (events)
+ 8117.370256 task clock ticks # 11.281 CPU utilization factor
+ 678 context switches # 0.000 M/sec
+ 133 CPU migrations # 0.000 M/sec
+ 235724 pagefaults # 0.029 M/sec
+ 24821162526 CPU cycles # 3057.784 M/sec
+ 18687303457 instructions # 2302.138 M/sec
+ 172158895 cache references # 21.209 M/sec
+ 27075259 cache misses # 3.335 M/sec
- Wall-clock time elapsed: 1001.252894 msecs
+ Wall-clock time elapsed: 719.554352 msecs
SEE ALSO
--------