diff options
| author | Peng Fan <peng.fan@nxp.com> | 2024-05-21 08:25:57 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2024-06-17 09:25:55 +0200 |
| commit | 997f2cdea334fc78231a40fe36632cddb92d48e7 (patch) | |
| tree | 30f934c16c6d73852b08a71bc3b806c9cc3ffdce /Documentation | |
| parent | pinctrl: qcom: sdm670: add pdc wakeirq map (diff) | |
| download | linux-997f2cdea334fc78231a40fe36632cddb92d48e7.tar.xz linux-997f2cdea334fc78231a40fe36632cddb92d48e7.zip | |
dt-bindings: firmware: arm,scmi: Add properties for i.MX95 Pinctrl OEM extensions
i.MX95 Pinctrl is managed by System Control Management Interface(SCMI)
firmware using OEM extensions. No functions, no groups are provided by
the firmware. So add i.MX95 specific properties.
To keep aligned with current i.MX pinctrl bindings, still use "fsl,pins"
for i.MX95.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Link: https://lore.kernel.org/r/20240521-pinctrl-scmi-imx95-v1-1-9a1175d735fd@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/firmware/arm,scmi.yaml | 4 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml | 53 |
2 files changed, 56 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml index 7de2c29606e5..f7a48b1e9f62 100644 --- a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml +++ b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml @@ -251,7 +251,9 @@ properties: type: object allOf: - $ref: '#/$defs/protocol-node' - - $ref: /schemas/pinctrl/pinctrl.yaml + - anyOf: + - $ref: /schemas/pinctrl/pinctrl.yaml + - $ref: /schemas/firmware/nxp,imx95-scmi-pinctrl.yaml unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml new file mode 100644 index 000000000000..a96fc6cce502 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2024 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/nxp,imx95-scmi-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX System Control and Management Interface (SCMI) Pinctrl Protocol + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +allOf: + - $ref: /schemas/pinctrl/pinctrl.yaml + +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + unevaluatedProperties: false + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can + be found in <arch/arm64/boot/dts/freescale/imx95-pinfunc.h>. The last + integer CONFIG is the pad setting value like pull-up on this pin. + Please refer to i.MX95 Reference Manual for detailed CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied. + + required: + - fsl,pins + +additionalProperties: true |