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authorRyder Lee <ryder.lee@mediatek.com>2018-03-06 10:09:29 +0100
committerStephen Boyd <sboyd@kernel.org>2018-03-19 21:41:28 +0100
commit2817a92dd90ab8c53f2c03b7c4d5f8590ee36940 (patch)
tree81555ca3deb8a57c809c82e7092c1343caf3628a /Documentation
parentclk: mediatek: update missing clock data for MT7622 audsys (diff)
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dt-bindings: clock: mediatek: update audsys documentation to adapt MFD device
The MediaTek audio hardware block that exposes functionalities that are handled by separate subsystems in the kernel. These functions are all mapped somewhere at 0x112xxxxx, and there are some control bits are mixed up with other functions within the same registers. This patch modifies example to illustrate child nodes. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt19
1 files changed, 14 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
index 9b8f578d5e19..97b304eaa47c 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
@@ -13,10 +13,19 @@ The AUDSYS controller uses the common clk binding from
Documentation/devicetree/bindings/clock/clock-bindings.txt
The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+Required sub-nodes:
+-------
+For common binding part and usage, refer to
+../sonud/mt2701-afe-pcm.txt.
+
Example:
-audsys: audsys@11220000 {
- compatible = "mediatek,mt7622-audsys", "syscon";
- reg = <0 0x11220000 0 0x1000>;
- #clock-cells = <1>;
-};
+ audsys: clock-controller@11220000 {
+ compatible = "mediatek,mt7622-audsys", "syscon";
+ reg = <0 0x11220000 0 0x2000>;
+ #clock-cells = <1>;
+
+ afe: audio-controller {
+ ...
+ };
+ };