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authorShengjiu Wang <shengjiu.wang@nxp.com>2022-07-01 11:32:41 +0200
committerMark Brown <broonie@kernel.org>2022-07-05 14:00:42 +0200
commit6c06ad34eda9e1990313ff80999e1a75a02fa1c0 (patch)
treea7b46b210c51500fe824f3c33d9999bf9c78ea90 /Documentation
parentASoC: dt-bindings: fsl_spdif: Add two PLL clock source (diff)
downloadlinux-6c06ad34eda9e1990313ff80999e1a75a02fa1c0.tar.xz
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ASoC: dt-bindings: fsl-sai: Add two PLL clock source
Add two PLL clock source, they are the parent clocks of root clock one is for 8kHz series rates, another one is for 11kHz series rates. They are optional clocks, if there are such clocks, then driver can switch between them for supporting more accurate rates. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1656667961-1799-7-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/sound/fsl-sai.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
index 4c66e6a1a533..fbdefc3fade7 100644
--- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
+++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
@@ -21,6 +21,9 @@ Required properties:
- clock-names : Must include the "bus" for register access and
"mclk1", "mclk2", "mclk3" for bit clock and frame
clock providing.
+ "pll8k", "pll11k" are optional, they are the clock
+ source for root clock, one is for 8kHz series rates
+ another one is for 11kHz series rates.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.