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author | Chao Xie <chao.xie@marvell.com> | 2014-10-31 03:13:49 +0100 |
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committer | Michael Turquette <mturquette@linaro.org> | 2014-11-13 01:34:14 +0100 |
commit | ab08aefcd12d4e21abb28264ca77a430dcce7ebd (patch) | |
tree | 21905ab01eee8447864ae796b634fb38ce0b4c61 /Documentation | |
parent | clk: mmp: add reset support (diff) | |
download | linux-ab08aefcd12d4e21abb28264ca77a430dcce7ebd.tar.xz linux-ab08aefcd12d4e21abb28264ca77a430dcce7ebd.zip |
clk: mmp: add pxa168 DT support for clock driver
It adds the DT support for pxa168 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/clock/marvell,pxa168.txt | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/marvell,pxa168.txt b/Documentation/devicetree/bindings/clock/marvell,pxa168.txt new file mode 100644 index 000000000000..c62eb1d173a6 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,pxa168.txt @@ -0,0 +1,21 @@ +* Marvell PXA168 Clock Controller + +The PXA168 clock subsystem generates and supplies clock to various +controllers within the PXA168 SoC. + +Required Properties: + +- compatible: should be one of the following. + - "marvell,pxa168-clock" - controller compatible with PXA168 SoC. + +- reg: physical base address of the clock subsystem and length of memory mapped + region. There are 3 places in SOC has clock control logic: + "mpmu", "apmu", "apbc". So three reg spaces need to be defined. + +- #clock-cells: should be 1. +- #reset-cells: should be 1. + +Each clock is assigned an identifier and client nodes use this identifier +to specify the clock which they consume. + +All these identifier could be found in <dt-bindings/clock/marvell,pxa168.h>. |