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| author | Jason Gunthorpe <jgunthorpe@obsidianresearch.com> | 2016-11-22 19:22:09 +0100 |
|---|---|---|
| committer | Alan Tull <atull@opensource.altera.com> | 2016-11-29 22:51:49 +0100 |
| commit | 1d7f1589d341344c0c598b00de44891a7968c6a0 (patch) | |
| tree | f1fd0d74131222096b584ebe16a11a9c0e476d34 /Documentation | |
| parent | fpga zynq: Fix incorrect ISR state on bootup (diff) | |
| download | linux-1d7f1589d341344c0c598b00de44891a7968c6a0.tar.xz linux-1d7f1589d341344c0c598b00de44891a7968c6a0.zip | |
fpga: Clarify how write_init works streaming modes
This interface was designed for streaming, but write_init's buf
argument has an unclear purpose. Define it to be the first bytes
of the bitstream. Each driver gets to set how many bytes (at most)
it wants to see. Short bitstreams will be passed through as-is, while
long ones will be truncated.
The intent is to allow drivers to peek at the header before the transfer
actually starts.
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: Alan Tull <atull@opensource.altera.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/fpga/fpga-mgr.txt | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/fpga/fpga-mgr.txt b/Documentation/fpga/fpga-mgr.txt index 087924f2b20c..86ee5078fd03 100644 --- a/Documentation/fpga/fpga-mgr.txt +++ b/Documentation/fpga/fpga-mgr.txt @@ -169,7 +169,10 @@ The programming sequence is: 2. .write (may be called once or multiple times) 3. .write_complete -The .write_init function will prepare the FPGA to receive the image data. +The .write_init function will prepare the FPGA to receive the image data. The +buffer passed into .write_init will be atmost .initial_header_size bytes long, +if the whole bitstream is not immediately available then the core code will +buffer up at least this much before starting. The .write function writes a buffer to the FPGA. The buffer may be contain the whole FPGA image or may be a smaller chunk of an FPGA image. In the latter |