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authorDouglas Anderson <dianders@chromium.org>2023-06-16 17:14:38 +0200
committerBjorn Andersson <andersson@kernel.org>2023-06-22 21:20:12 +0200
commitc0877829ada0406233aee5bd54f6813db79d5f1f (patch)
tree6ef955ec774e10b992c07b72aeec71eb63e06e5f /Documentation
parentarm64: dts: qcom: sm8550: Use the correct LLCC register scheme (diff)
downloadlinux-c0877829ada0406233aee5bd54f6813db79d5f1f.tar.xz
linux-c0877829ada0406233aee5bd54f6813db79d5f1f.zip
dt-bindings: firmware: qcom,scm: Document that SCM can be dma-coherent
Trogdor devices use firmware backed by TF-A instead of Qualcomm's normal TZ. On TF-A we end up mapping memory as cacheable. Specifically, you can see in Trogdor's TF-A code [1] in qti_sip_mem_assign() that we call qti_mmap_add_dynamic_region() with MT_RO_DATA. This translates down to MT_MEMORY instead of MT_NON_CACHEABLE or MT_DEVICE. Let's allow devices like trogdor to be described properly by allowing "dma-coherent" in the SCM node. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230616081440.v2.1.Ie79b5f0ed45739695c9970df121e11d724909157@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/firmware/qcom,scm.yaml2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
index 367d04ad1923..83381f3a1341 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
@@ -71,6 +71,8 @@ properties:
minItems: 1
maxItems: 3
+ dma-coherent: true
+
interconnects:
maxItems: 1