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authorMax Filippov <jcmvbkbc@gmail.com>2014-02-04 00:33:10 +0100
committerDavid S. Miller <davem@davemloft.net>2014-02-05 05:19:51 +0100
commita13aff0641a92dc0b95136e32526e2ce81ffc4ef (patch)
tree7b99892ca02dd681f538e6de9f99ca7dcf225931 /Documentation
parentnet: ethoc: don't advertise gigabit speed on attached PHY (diff)
downloadlinux-a13aff0641a92dc0b95136e32526e2ce81ffc4ef.tar.xz
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net: ethoc: set up MII management bus clock
MII management bus clock is derived from the MAC clock by dividing it by MIIMODER register CLKDIV field value. This value may need to be set up in case it is undefined or its default value is too high (and communication with PHY is too slow) or too low (and communication with PHY is impossible). The value of CLKDIV is not specified directly, but is derived from the MAC clock for the default MII management bus frequency of 2.5MHz. The MAC clock may be specified in the platform data, or in the 'clocks' device tree attribute. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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