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author | Kalle Valo <kvalo@kernel.org> | 2021-12-16 19:12:58 +0100 |
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committer | Kalle Valo <kvalo@kernel.org> | 2021-12-16 19:12:58 +0100 |
commit | fd5e3c4ab92e39b3411147b3fd845e70e81ac7a7 (patch) | |
tree | 0158084d30c6c3024aae5366c157f1b5277227ec /Documentation | |
parent | wilc1000: Improve WILC TX performance when power_save is off (diff) | |
parent | wcn36xx: Implement beacon filtering (diff) | |
download | linux-fd5e3c4ab92e39b3411147b3fd845e70e81ac7a7.tar.xz linux-fd5e3c4ab92e39b3411147b3fd845e70e81ac7a7.zip |
Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
ath.git patches for v5.17. Major changes:
ath11k
* support PCI devices with 1 MSI vector
* WCN6855 hw2.1 support
* 11d scan offload support
* full monitor mode, only supported on QCN9074
* scan MAC address randomization support
* reserved host DDR addresses from DT for PCI devices support
ath9k
* switch to rate table based lookup
ath
* extend South Korea regulatory domain support
wcn36xx
* beacon filter support
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml index 85c2f699d602..cdf7b873b419 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml @@ -150,6 +150,12 @@ properties: string to uniquely identify variant of the calibration data in the board-2.bin for designs with colliding bus and device specific ids + memory-region: + maxItems: 1 + description: + phandle to a node describing reserved memory (System RAM memory) + used by ath11k firmware (see bindings/reserved-memory/reserved-memory.txt) + required: - compatible - reg @@ -279,3 +285,27 @@ examples: "tcl2host-status-ring"; qcom,rproc = <&q6v5_wcss>; }; + + - | + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + qcn9074_0: qcn9074_0@51100000 { + no-map; + reg = <0x0 0x51100000 0x0 0x03500000>; + }; + }; + + pci { + pcie0 { + #size-cells = <2>; + #address-cells = <3>; + + wifi_0: wifi@0 { + reg = <0 0 0 0 0>; + memory-region = <&qcn9074_0>; + }; + }; + }; |