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| author | Thierry Reding <treding@nvidia.com> | 2013-12-13 15:27:42 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2013-12-17 18:10:05 +0100 |
| commit | 5d30be283f30bac34dae26a1014795b061f10c49 (patch) | |
| tree | a7c2ef948676340fc94e00a06e874dd974c98938 /Documentation | |
| parent | drm/tegra: Implement panel support (diff) | |
| download | linux-5d30be283f30bac34dae26a1014795b061f10c49.tar.xz linux-5d30be283f30bac34dae26a1014795b061f10c49.zip | |
gpu: host1x: Update host1x device tree example
The display controller primary clock was recently renamed to "dc", so
update the example to reflect that.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt index 31314bd40da9..53045fe32d20 100644 --- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt @@ -255,7 +255,7 @@ Example: interrupts = <0 73 0x04>; clocks = <&tegra_car TEGRA20_CLK_DISP1>, <&tegra_car TEGRA20_CLK_PLL_P>; - clock-names = "disp1", "parent"; + clock-names = "dc", "parent"; resets = <&tegra_car 27>; reset-names = "dc"; @@ -270,7 +270,7 @@ Example: interrupts = <0 74 0x04>; clocks = <&tegra_car TEGRA20_CLK_DISP2>, <&tegra_car TEGRA20_CLK_PLL_P>; - clock-names = "disp2", "parent"; + clock-names = "dc", "parent"; resets = <&tegra_car 26>; reset-names = "dc"; |