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author | Dmitry Osipenko <digetx@gmail.com> | 2020-11-04 17:48:52 +0100 |
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committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-11-06 19:37:20 +0100 |
commit | c553bb54a486eab2b0d3671db4b985c8d1ba51e9 (patch) | |
tree | 78dbb7c64b9c5737d36418972fc10a3b35e1c209 /Documentation | |
parent | dt-bindings: tegra30-actmon: Document OPP and interconnect properties (diff) | |
download | linux-c553bb54a486eab2b0d3671db4b985c8d1ba51e9.tar.xz linux-c553bb54a486eab2b0d3671db4b985c8d1ba51e9.zip |
dt-bindings: host1x: Document new interconnect properties
Most of Host1x devices have at least one memory client. These clients
are directly connected to the memory controller. The new interconnect
properties represent the memory client's connection to the memory
controller.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201104164923.21238-17-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index ac63ae4a3861..34d993338453 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -20,6 +20,10 @@ Required properties: - reset-names: Must include the following entries: - host1x +Each host1x client module having to perform DMA through the Memory Controller +should have the interconnect endpoints set to the Memory Client and External +Memory respectively. + The host1x top-level node defines a number of children, each representing one of the following host1x client modules: @@ -36,6 +40,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - mpe + Optional properties: + - interconnects: Must contain entry for the MPE memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - vi: video input Required properties: @@ -113,6 +123,12 @@ of the following host1x client modules: Required properties: - remote-endpoint: phandle to vi port 'endpoint' node. + Optional properties: + - interconnects: Must contain entry for the VI memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - epp: encoder pre-processor Required properties: @@ -126,6 +142,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - epp + Optional properties: + - interconnects: Must contain entry for the EPP memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - isp: image signal processor Required properties: @@ -139,6 +161,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - isp + Optional properties: + - interconnects: Must contain entry for the ISP memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - gr2d: 2D graphics engine Required properties: @@ -152,6 +180,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - 2d + Optional properties: + - interconnects: Must contain entry for the GR2D memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - gr3d: 3D graphics engine Required properties: @@ -170,6 +204,12 @@ of the following host1x client modules: - 3d - 3d2 (Only required on SoCs with two 3D clocks) + Optional properties: + - interconnects: Must contain entry for the GR3D memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - dc: display controller Required properties: @@ -197,6 +237,10 @@ of the following host1x client modules: - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection - nvidia,edid: supplies a binary EDID blob - nvidia,panel: phandle of a display panel + - interconnects: Must contain entry for the DC memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. - hdmi: High Definition Multimedia Interface @@ -345,6 +389,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - vic + Optional properties: + - interconnects: Must contain entry for the VIC memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + Example: / { @@ -498,6 +548,15 @@ Example: resets = <&tegra_car 27>; reset-names = "dc"; + interconnects = <&mc TEGRA20_MC_DISPLAY0A &emc>, + <&mc TEGRA20_MC_DISPLAY0B &emc>, + <&mc TEGRA20_MC_DISPLAY0C &emc>, + <&mc TEGRA20_MC_DISPLAYHC &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; @@ -513,6 +572,15 @@ Example: resets = <&tegra_car 26>; reset-names = "dc"; + interconnects = <&mc TEGRA20_MC_DISPLAY0AB &emc>, + <&mc TEGRA20_MC_DISPLAY0BB &emc>, + <&mc TEGRA20_MC_DISPLAY0CB &emc>, + <&mc TEGRA20_MC_DISPLAYHCB &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; |