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authorSuman Anna <s-anna@ti.com>2019-06-05 18:34:33 +0200
committerTero Kristo <t-kristo@ti.com>2019-06-19 10:59:49 +0200
commit78eccc2ac98e4166def294f02283f21cefd89591 (patch)
treec9d7884bc301d180f4c39924fc7de8a2686236e0 /Documentation
parentarm64: dts: ti: k3-j721e: Add interrupt controllers in wakeup domain (diff)
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arm64: dts: ti: k3-j721e: Add the MCU SRAM node
Add the on-chip SRAM present within the MCU domain as a mmio-sram node. The K3 J721E SoCs have 1 MB of such memory. Any specific memory range within this RAM needed by a driver/software module ought to be reserved using an appropriate child node. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
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