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authorJosh Wu <josh.wu@atmel.com>2013-08-27 13:28:00 +0200
committerJonathan Cameron <jic23@kernel.org>2013-09-18 20:43:20 +0200
commitdb10e201172f48dad29d81ee1fec96384f0eab35 (patch)
tree8d99b9b0c2db7151988ba3f5c961763587e558a2 /Kbuild
parentstaging: line6: add bounds check in snd_toneport_source_put() (diff)
downloadlinux-db10e201172f48dad29d81ee1fec96384f0eab35.tar.xz
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iio: at91: fix adc_clk overflow
The adc_clk variable is currently defined using a 32-bits unsigned integer, which will overflow under some very valid range of operations. Such overflow will occur if, for example, the parent clock is set to a 20MHz frequency and the ADC startup time is larger than 215ns. To fix this, introduce an intermediate variable holding the clock rate in kHz. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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