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authorStefan Roese <sr@denx.de>2007-11-20 11:19:16 +0100
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-12-23 20:31:16 +0100
commitf4151b9ba87901eb3a7bc49f418cc352d4e1927e (patch)
tree7481891935cea47d7794e583a6fdfe530575c17d /Kbuild
parent[POWERPC] 4xx: libfdt and pci fixes for Rainier (diff)
downloadlinux-f4151b9ba87901eb3a7bc49f418cc352d4e1927e.tar.xz
linux-f4151b9ba87901eb3a7bc49f418cc352d4e1927e.zip
[POWERPC] 4xx: Fix TLB 0 problem with CONFIG_SERIAL_TEXT_DEBUG
Right now TLB entry 0 ist used as UART0 mapping for the early debug output (via CONFIG_SERIAL_TEXT_DEBUG). This causes problems when many TLB's get used upon Linux bootup (e.g. while PCIe scanning behind bridges and/or switches on 440SPe platforms). This will overwrite the TLB 0 entry and further debug output's may crash/hang the system. This patch moves the early debug UART0 TLB entry from 0 to 62 as done in arch/powerpc. This way it is in the "pinned" area and will not get overwritten. Also the arch/ppc/mm/44x_mmu.c code is now synced with the newer code from arch/powerpc. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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