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| author | William Breathitt Gray <vilhelm.gray@gmail.com> | 2021-08-27 05:47:46 +0200 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2021-10-17 11:52:46 +0200 |
| commit | ea434ff82649111de4fcabd76187270f8abdb63a (patch) | |
| tree | ca440b651270ee950752f18bd14db5525d10c1c1 /LICENSES | |
| parent | counter: stm32-lptimer-cnt: Provide defines for clock polarities (diff) | |
| download | linux-ea434ff82649111de4fcabd76187270f8abdb63a.tar.xz linux-ea434ff82649111de4fcabd76187270f8abdb63a.zip | |
counter: stm32-timer-cnt: Provide defines for slave mode selection
The STM32 timer permits configuration of the counter encoder mode via
the slave mode control register (SMCR) slave mode selection (SMS) bits.
This patch provides preprocessor defines for the supported encoder
modes.
Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/ad3d9cd7af580d586316d368f74964cbc394f981.1630031207.git.vilhelm.gray@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'LICENSES')
0 files changed, 0 insertions, 0 deletions