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authorPeter Zijlstra <a.p.zijlstra@chello.nl>2009-07-08 10:21:41 +0200
committerIngo Molnar <mingo@elte.hu>2009-07-10 10:28:27 +0200
commit9c74fb50867e8fb5f3be3be06716492c0f79309e (patch)
tree52f5ca52ae0ac6c8430b79ba77f37f7e40a4ec96 /MAINTAINERS
parentperf_counter: Add P6 PMU support (diff)
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perf_counter: Fix up P6 PMU details
The P6 doesn't seem to support cache ref/hit/miss counts, so we extend the generic hardware event codes to have 0 and -1 mean the same thing as for the generic cache events. Furthermore, it turns out the 0 event does not count (that is, its reported that on PPro it actually does count something), therefore use a event configuration that's specified not to count to disable the counters. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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