diff options
| author | Alexander Shishkin <alexander.shishkin@linux.intel.com> | 2019-07-05 16:14:21 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-07-25 13:03:18 +0200 |
| commit | 615c164da0eb42cbfb1688cb429cc4d5039db5d8 (patch) | |
| tree | 5b2de647c457cf257c8afef1dfa50af0af8ea833 /MAINTAINERS | |
| parent | misc: alcor_pci: Use dev_get_drvdata (diff) | |
| download | linux-615c164da0eb42cbfb1688cb429cc4d5039db5d8.tar.xz linux-615c164da0eb42cbfb1688cb429cc4d5039db5d8.zip | |
intel_th: msu: Introduce buffer interface
Introduces a concept of external buffers, which is a mechanism for creating
trace sinks that would receive trace data from MSC buffers and transfer it
elsewhere.
A external buffer can implement its own window allocation/deallocation if
it has to. It must provide a callback that's used to notify it when a
window fills up, so that it can then start a DMA transaction from that
window 'elsewhere'. This window remains in a 'locked' state and won't be
used for storing new trace data until the buffer 'unlocks' it with a
provided API call, at which point the window can be used again for storing
trace data.
This relies on a functional "last block" interrupt, so not all versions of
Trace Hub can use this feature, which does not reflect on existing users.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190705141425.19894-2-alexander.shishkin@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 783569e3c4b4..c8c506b8423b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8360,6 +8360,7 @@ M: Alexander Shishkin <alexander.shishkin@linux.intel.com> S: Supported F: Documentation/trace/intel_th.rst F: drivers/hwtracing/intel_th/ +F: include/linux/intel_th.h INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT) M: Ning Sun <ning.sun@intel.com> |