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| author | Chunyan Zhang <chunyan.zhang@spreadtrum.com> | 2017-12-07 13:57:10 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-12-22 00:00:53 +0100 |
| commit | 3e37b005580b9db89d7f335e121d52d3bd58e234 (patch) | |
| tree | 49012bb7f11db65920d47855a3a29cd8fac8ab9a /MAINTAINERS | |
| parent | clk: sprd: add composite clock support (diff) | |
| download | linux-3e37b005580b9db89d7f335e121d52d3bd58e234.tar.xz linux-3e37b005580b9db89d7f335e121d52d3bd58e234.zip | |
clk: sprd: add adjustable pll support
Introduced a common adjustable pll clock driver for Spreadtrum SoCs.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions