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author | Hauke Mehrtens <hauke@hauke-m.de> | 2018-09-09 22:16:45 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2018-09-13 17:14:33 +0200 |
commit | fe1a56420cf2ec28c8eceef672b87de0bbe1a260 (patch) | |
tree | 85fd338d8b39a4567efd1d2c3253210dee52f5ef /MAINTAINERS | |
parent | dt-bindings: net: Add lantiq, xrx200-net DT bindings (diff) | |
download | linux-fe1a56420cf2ec28c8eceef672b87de0bbe1a260.tar.xz linux-fe1a56420cf2ec28c8eceef672b87de0bbe1a260.zip |
net: lantiq: Add Lantiq / Intel VRX200 Ethernet driver
This drives the PMAC between the GSWIP Switch and the CPU in the VRX200
SoC. This is currently only the very basic version of the Ethernet
driver.
When the DMA channel is activated we receive some packets which were
send to the SoC while it was still in U-Boot, these packets have the
wrong header. Resetting the IP cores did not work so we read out the
extra packets at the beginning and discard them.
This also adapts the clock code in sysctrl.c to use the default name of
the device node so that the driver gets the correct clock. sysctrl.c
should be replaced with a proper common clock driver later.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r-- | MAINTAINERS | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index a11fbbe2be73..a58cfcb2ee6b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8172,6 +8172,7 @@ M: Hauke Mehrtens <hauke@hauke-m.de> L: netdev@vger.kernel.org S: Maintained F: net/dsa/tag_gswip.c +F: drivers/net/ethernet/lantiq_xrx200.c LANTIQ MIPS ARCHITECTURE M: John Crispin <john@phrozen.org> |