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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-30 01:47:21 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-30 01:47:21 +0100 |
| commit | 7bcd34259466413b477d85d12a48789b5e90e0f4 (patch) | |
| tree | f6df4e6c4c0dfadebb15b90592fd2b3f845cff9b /MAINTAINERS | |
| parent | Merge tag 'xtensa-20180129' of git://github.com/jcmvbkbc/linux-xtensa (diff) | |
| parent | irqdomain: Kill CONFIG_IRQ_DOMAIN_DEBUG (diff) | |
| download | linux-7bcd34259466413b477d85d12a48789b5e90e0f4.tar.xz linux-7bcd34259466413b477d85d12a48789b5e90e0f4.zip | |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner:
"A rather small set of irq updates this time:
- removal of the old and now obsolete irq domain debugging code
- the new Goldfish PIC driver
- the usual pile of small fixes and updates"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqdomain: Kill CONFIG_IRQ_DOMAIN_DEBUG
irq/work: Improve the flag definitions
irqchip/gic-v3: Fix the driver probe() fail due to disabled GICC entry
irqchip/irq-goldfish-pic: Add Goldfish PIC driver
dt-bindings/goldfish-pic: Add device tree binding for Goldfish PIC driver
irqchip/ompic: fix return value check in ompic_of_init()
dt-bindings/bcm283x: Define polarity of per-cpu interrupts
irqchip/irq-bcm2836: Add support for DT interrupt polarity
dt-bindings/bcm2836-l1-intc: Add interrupt polarity support
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 9e8de5670e68..4ad9d6a4c3ac 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -875,6 +875,12 @@ S: Supported F: drivers/android/ F: drivers/staging/android/ +ANDROID GOLDFISH PIC DRIVER +M: Miodrag Dinic <miodrag.dinic@mips.com> +S: Supported +F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt +F: drivers/irqchip/irq-goldfish-pic.c + ANDROID GOLDFISH RTC DRIVER M: Miodrag Dinic <miodrag.dinic@mips.com> S: Supported |