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authorKrishna Reddy <vdumpa@nvidia.com>2020-07-18 21:34:55 +0200
committerWill Deacon <will@kernel.org>2020-07-20 10:30:50 +0200
commitaab5a1c882760a5bc990b14e5c0c2ee4dab5f1ac (patch)
tree66eaaf99f606d1050731cb8b4a369bfc04b47e08 /MAINTAINERS
parentiommu/arm-smmu: ioremap smmu mmio region before implementation init (diff)
downloadlinux-aab5a1c882760a5bc990b14e5c0c2ee4dab5f1ac.tar.xz
linux-aab5a1c882760a5bc990b14e5c0c2ee4dab5f1ac.zip
iommu/arm-smmu: add NVIDIA implementation for ARM MMU-500 usage
NVIDIA's Tegra194 SoC has three ARM MMU-500 instances. It uses two of the ARM MMU-500s together to interleave IOVA accesses across them and must be programmed identically. This implementation supports programming the two ARM MMU-500s that must be programmed identically. The third ARM MMU-500 instance is supported by standard arm-smmu.c driver itself. Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Nicolin Chen <nicoleotsuka@gmail.com> Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Link: https://lore.kernel.org/r/20200718193457.30046-4-vdumpa@nvidia.com Signed-off-by: Will Deacon <will@kernel.org>
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diff --git a/MAINTAINERS b/MAINTAINERS
index 496fd4eafb68..ee2c0ba13a0f 100644
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@@ -16810,8 +16810,10 @@ F: drivers/i2c/busses/i2c-tegra.c
TEGRA IOMMU DRIVERS
M: Thierry Reding <thierry.reding@gmail.com>
+R: Krishna Reddy <vdumpa@nvidia.com>
L: linux-tegra@vger.kernel.org
S: Supported
+F: drivers/iommu/arm-smmu-nvidia.c
F: drivers/iommu/tegra*
TEGRA KBC DRIVER