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authorLinus Torvalds <torvalds@linux-foundation.org>2024-03-15 19:48:01 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2024-03-15 19:48:01 +0100
commit6dff52b828655ccf416f46c08a48679740b724f0 (patch)
tree1f89bc380fe3b9d305db7d5a219c4c7b665e79bd /MAINTAINERS
parentMerge tag 'media/v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mch... (diff)
parentMerge branches 'clk-samsung', 'clk-imx', 'clk-rockchip', 'clk-clkdev' and 'cl... (diff)
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "Not a ton of stuff happening in the clk framework. We got some more devm helpers and we seem to be going in the direction of "just turn this stuff on already and leave me alone!" with the addition of a devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that into a pmdomain that drivers attach instead, but this API should help drivers simplify in the meantime. Outside of the devm wrappers, we've got the usual clk driver updates that are dominated by the major phone SoC vendors (Samsung and Qualcomm) and the non-critical driver fixes for things like incorrect topology descriptions and wrong registers or bit fields. More details are below, but I'd say that it looks pretty ordinary. The only thing that really jumps out at me is the Renesas clk driver that's ignoring clks that are assigned to remote processors in DeviceTree. That's a new feature that they're using to avoid marking clks as CLK_IGNORE_UNUSED based on the configuration of the system. Core: - Increase dev_id len for clkdev lookups - Add a devm_clk_bulk_get_all_enable() API to get and enable all clks for a device - Add a devm variant of clk_rate_exclusive_get() New Drivers: - Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1 Elite SoC - Google GS101 PERIC0 and PERIC1 clock controllers - Exynos850 PDMA clocks - Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock controllers Removed Drivers: - Remove the unused Qualcomm sc7180 modem clk driver Updates: - Fix some static checker errors in the Hisilicon clk driver - Polarfire MSSPLL hardware has 4 output clocks (the driver supported previously only one output); each of these 4 outputs feed dividers and the output of each divider feed individual hardware blocks (e.g. CAN, Crypto, eMMC); individual hardware block drivers need to control their clocks thus clock driver support was added for all MSSPLL output clocks - Typo fixes in the Qualcomm IPQ5018 GCC driver - Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi - Properly terminate frequency tables in different Qualcomm clk drivers - Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953 - Add missing UFS CLKREF clks on Qualcomm SC8180X - Avoid significant delays during boot by adding a softdep on rpmhpd to Qualcomm SDM845 gcc driver - Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC driver - Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC driver - Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk driver - Switch display, GPU, video, and camera Qualcomm clk drivers to module_platform_driver() - Set a longer delay for Venus resets on many Qualcomm SoCs - Correct the GDSC wait times in the Qualcomm SDM845 display clk driver - Fix clock listing Oops on Amlogic axg - New pll-rate for Rockchip rk3568 - i2s rate improvements for Rockchip rk3399 - Rockchip rk3588 syscon clock fixes and removal of overall clock-number from the rk3588 binding header - A prerequisite for later improvements to the Rockchip rk3588 linked clocks - Minor clean-ups and error handling improvements in both composite-8m and SCU i.MX clock drivers - Fix for SAI_MCLK_SEL definition for i.MX8MP - Register the Samsung CMU MISC clock controller earlier, so the Multi Core Timer clocksource can use it on Google GS101 - Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI will get proper clock rates - Refactor the generic Samsung CPU clock controllers code, preparing it for supporting Exynos850 CPU clocks - Fix some clk kerneldoc warnings - Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on Renesas R-Car V4M - Ignore all clocks which are assigned to a non-Linux system in the Renesas clk driver - Add watchdog clock on Renesas RZ/G3S - Add camera (CRU) clock and reset on Renesas RZ/G2UL - Add support for the Renesas R-Car V4M (R8A779H0) SoC - Convert some clk bindings to YAML so they can be validated" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits) clk: zynq: Prevent null pointer dereference caused by kmalloc failure clk: fractional-divider: Use bit operations consistently clk: fractional-divider: Move mask calculations out of lock clk: Fix clk_core_get NULL dereference clk: starfive: jh7110-vout: Convert to platform remove callback returning void clk: starfive: jh7110-isp: Convert to platform remove callback returning void clk: imx: imx8-acm: Convert to platform remove callback returning void clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk' clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk' clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe() clk: Add a devm variant of clk_rate_exclusive_get() ...
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diff --git a/MAINTAINERS b/MAINTAINERS
index fd00b0fc5b70..60a0b363582c 100644
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@@ -22005,7 +22005,6 @@ F: drivers/i2c/busses/i2c-davinci.c
TI DAVINCI SERIES CLOCK DRIVER
M: David Lechner <david@lechnology.com>
-R: Sekhar Nori <nsekhar@ti.com>
S: Maintained
F: Documentation/devicetree/bindings/clock/ti/davinci/
F: drivers/clk/davinci/