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| author | Arnd Bergmann <arnd@arndb.de> | 2023-01-30 16:08:36 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2023-01-30 16:08:36 +0100 |
| commit | 75dae633c9c0c8d106e97bcf17bec79f652feb2c (patch) | |
| tree | df078f9e7a6e83762ace244a035cd487891691e5 /MAINTAINERS | |
| parent | Merge tag 'memory-controller-drv-6.3-2' of https://git.kernel.org/pub/scm/lin... (diff) | |
| parent | Merge patch series "JH7110 PMU Support" (diff) | |
| download | linux-75dae633c9c0c8d106e97bcf17bec79f652feb2c.tar.xz linux-75dae633c9c0c8d106e97bcf17bec79f652feb2c.zip | |
Merge tag 'riscv-soc-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers
RISC-V SoC drivers for v6.3-mw0
It's all StarFive stuff this time:
Their new JH7110 SoC uses a SiFive core complex, and therefore a
SiFive cache controller too. That needed a compatible added to both the
binding and driver.
The JH7110 also has power domains, which are supported by a new driver
and a corresponding dt-binding.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-soc-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
soc: starfive: Add StarFive JH71XX pmu driver
dt-bindings: power: Add starfive,jh7110-pmu
soc: sifive: ccache: Add StarFive JH7110 support
dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC
Link: https://lore.kernel.org/r/Y9LNIm9pkr+Owv/e@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index a36df9ed283d..553d2cba6a9b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19913,6 +19913,19 @@ F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml F: drivers/reset/reset-starfive-jh7100.c F: include/dt-bindings/reset/starfive-jh7100.h +STARFIVE SOC DRIVERS +M: Conor Dooley <conor@kernel.org> +S: Maintained +T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ +F: drivers/soc/starfive/ + +STARFIVE JH71XX PMU CONTROLLER DRIVER +M: Walker Chen <walker.chen@starfivetech.com> +S: Supported +F: Documentation/devicetree/bindings/power/starfive* +F: drivers/soc/starfive/jh71xx_pmu.c +F: include/dt-bindings/power/starfive,jh7110-pmu.h + STATIC BRANCH/CALL M: Peter Zijlstra <peterz@infradead.org> M: Josh Poimboeuf <jpoimboe@kernel.org> |