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authorWill Deacon <will.deacon@arm.com>2015-03-23 20:07:02 +0100
committerWill Deacon <will.deacon@arm.com>2015-04-01 11:24:31 +0200
commit905e8c5dcaa147163672b06fe9dcb5abaacbc711 (patch)
tree4284f6e2ecac493b6e4938e4b60e57fb521c3790 /README
parentarm64: Use bool function return values of true/false not 1/0 (diff)
downloadlinux-905e8c5dcaa147163672b06fe9dcb5abaacbc711.tar.xz
linux-905e8c5dcaa147163672b06fe9dcb5abaacbc711.zip
arm64: errata: add workaround for cortex-a53 erratum #845719
When running a compat (AArch32) userspace on Cortex-A53, a load at EL0 from a virtual address that matches the bottom 32 bits of the virtual address used by a recent load at (AArch64) EL1 might return incorrect data. This patch works around the issue by writing to the contextidr_el1 register on the exception return path when returning to a 32-bit task. This workaround is patched in at runtime based on the MIDR value of the processor. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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