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authorPeter Zijlstra <peterz@infradead.org>2020-07-22 10:22:02 +0200
committerPeter Zijlstra <peterz@infradead.org>2020-07-22 10:22:02 +0200
commit015dc08918785201199ed3450c22bb8939f09dfe (patch)
tree7ba52e0b1e518fa750aaac0c1da8dd70c3eca1eb /arch/arc/Kconfig
parentsched: Add a tracepoint to track rq->nr_running (diff)
parentsched: Fix race against ptrace_freeze_trace() (diff)
downloadlinux-015dc08918785201199ed3450c22bb8939f09dfe.tar.xz
linux-015dc08918785201199ed3450c22bb8939f09dfe.zip
Merge branch 'sched/urgent'
Diffstat (limited to 'arch/arc/Kconfig')
-rw-r--r--arch/arc/Kconfig15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index fddc70029727..197896cfbd23 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -170,6 +170,15 @@ config ARC_CPU_HS
endchoice
+config ARC_TUNE_MCPU
+ string "Override default -mcpu compiler flag"
+ default ""
+ help
+ Override default -mcpu=xxx compiler flag (which is set depending on
+ the ISA version) with the specified value.
+ NOTE: If specified flag isn't supported by current compiler the
+ ISA default value will be used as a fallback.
+
config CPU_BIG_ENDIAN
bool "Enable Big Endian Mode"
help
@@ -465,6 +474,12 @@ config ARC_IRQ_NO_AUTOSAVE
This is programmable and can be optionally disabled in which case
software INTERRUPT_PROLOGUE/EPILGUE do the needed work
+config ARC_LPB_DISABLE
+ bool "Disable loop buffer (LPB)"
+ help
+ On HS cores, loop buffer (LPB) is programmable in runtime and can
+ be optionally disabled.
+
endif # ISA_ARCV2
endmenu # "ARC CPU Configuration"