summaryrefslogtreecommitdiffstats
path: root/arch/arc/boot/dts/angel4.dts
diff options
context:
space:
mode:
authorVineet Gupta <vgupta@synopsys.com>2013-01-18 10:42:21 +0100
committerVineet Gupta <vgupta@synopsys.com>2013-02-15 18:45:57 +0100
commitabe11ddea1d759f9995a9a4636c28c9b40856ca8 (patch)
tree53085d131ecbe7a810f9feadcba571f49a2e9465 /arch/arc/boot/dts/angel4.dts
parentARC: [DeviceTree] Convert some Kconfig items to runtime values (diff)
downloadlinux-abe11ddea1d759f9995a9a4636c28c9b40856ca8.tar.xz
linux-abe11ddea1d759f9995a9a4636c28c9b40856ca8.zip
ARC: [plat-arcfpga]: Enabling DeviceTree for Angel4 board
* arc-uart platform device now populated dynamically, using of_platform_populate() - applies to any other device whatsoever. * uart in turn requires incore arc-intc to be also present in DT * A irq-domain needs to be instantiated for IRQ requests by DT probed device (e.g. arc-uart) TODO: switch over to linear irq domain once all devs have been transitioned to DT Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arc/boot/dts/angel4.dts')
-rw-r--r--arch/arc/boot/dts/angel4.dts55
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arc/boot/dts/angel4.dts b/arch/arc/boot/dts/angel4.dts
new file mode 100644
index 000000000000..4c188d5bc10c
--- /dev/null
+++ b/arch/arc/boot/dts/angel4.dts
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "snps,arc-angel4";
+ clock-frequency = <80000000>; /* 80 MHZ */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+
+ chosen {
+ bootargs = "console=ttyARC0,115200n8";
+ };
+
+ aliases {
+ serial0 = &arcuart0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>; /* 256M */
+ };
+
+ fpga {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* child and parent address space 1:1 mapped */
+ ranges;
+
+ intc: interrupt-controller {
+ compatible = "snps,arc700-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ arcuart0: serial@c0fc1000 {
+ compatible = "snps,arc-uart";
+ reg = <0xc0fc1000 0x100>;
+ interrupts = <5>;
+ clock-frequency = <80000000>;
+ baud = <115200>;
+ status = "okay";
+ };
+ };
+};