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authorEugeniy Paltsev <eugeniy.paltsev@synopsys.com>2019-02-19 11:52:26 +0100
committerVineet Gupta <vgupta@synopsys.com>2019-02-25 17:52:16 +0100
commit5d4ab8d0960e399e85a55e659b11cfc86a03a776 (patch)
treec98acab7e9306c6cb1f63936553d47e0b1f303c9 /arch/arc/boot
parentARC: [plat-hsdk]: Add reset controller handle to manage USB reset (diff)
downloadlinux-5d4ab8d0960e399e85a55e659b11cfc86a03a776.tar.xz
linux-5d4ab8d0960e399e85a55e659b11cfc86a03a776.zip
ARC: [plat-hsdk]: Enable AXI DW DMAC support
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/boot')
-rw-r--r--arch/arc/boot/dts/hsdk.dts27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts
index b62088bf03a8..69bc1c9e8e50 100644
--- a/arch/arc/boot/dts/hsdk.dts
+++ b/arch/arc/boot/dts/hsdk.dts
@@ -167,6 +167,18 @@
#clock-cells = <0>;
};
+ dmac_core_clk: dmac-core-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <400000000>;
+ #clock-cells = <0>;
+ };
+
+ dmac_cfg_clk: dmac-gpu-cfg-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ #clock-cells = <0>;
+ };
+
gmac: ethernet@8000 {
#interrupt-cells = <1>;
compatible = "snps,dwmac";
@@ -239,6 +251,21 @@
reg = <0>;
};
};
+
+ dmac: dmac@80000 {
+ compatible = "snps,axi-dma-1.01a";
+ reg = <0x80000 0x400>;
+ interrupts = <27>;
+ clocks = <&dmac_core_clk>, <&dmac_cfg_clk>;
+ clock-names = "core-clk", "cfgr-clk";
+
+ dma-channels = <4>;
+ snps,dma-masters = <2>;
+ snps,data-width = <3>;
+ snps,block-size = <4096 4096 4096 4096>;
+ snps,priority = <0 1 2 3>;
+ snps,axi-max-burst-len = <16>;
+ };
};
memory@80000000 {