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| author | Vineet Gupta <vgupta@synopsys.com> | 2013-05-13 15:00:41 +0200 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2015-06-22 10:36:55 +0200 |
| commit | 1f6ccfff6314672743ad7252160654709e997a2a (patch) | |
| tree | f2027c01b8d010b9d1aaa3685c7c4d0644271f53 /arch/arc/include/asm/thread_info.h | |
| parent | ARCv2: [intc] HS38 core interrupt controller (diff) | |
| download | linux-1f6ccfff6314672743ad7252160654709e997a2a.tar.xz linux-1f6ccfff6314672743ad7252160654709e997a2a.zip | |
ARCv2: Support for ARCv2 ISA and HS38x cores
The notable features are:
- SMP configurations of upto 4 cores with coherency
- Optional L2 Cache and IO-Coherency
- Revised Interrupt Architecture (multiple priorites, reg banks,
auto stack switch, auto regfile save/restore)
- MMUv4 (PIPT dcache, Huge Pages)
- Instructions for
* 64bit load/store: LDD, STD
* Hardware assisted divide/remainder: DIV, REM
* Function prologue/epilogue: ENTER_S, LEAVE_S
* IRQ enable/disable: CLRI, SETI
* pop count: FFS, FLS
* SETcc, BMSKN, XBFU...
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/thread_info.h')
| -rw-r--r-- | arch/arc/include/asm/thread_info.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arc/include/asm/thread_info.h b/arch/arc/include/asm/thread_info.h index aca0d5a45c7b..3af67455659a 100644 --- a/arch/arc/include/asm/thread_info.h +++ b/arch/arc/include/asm/thread_info.h @@ -25,6 +25,7 @@ #endif #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) +#define THREAD_SHIFT (PAGE_SHIFT << THREAD_SIZE_ORDER) #ifndef __ASSEMBLY__ |