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authorVineet Gupta <vgupta@synopsys.com>2015-09-15 03:43:42 +0200
committerVineet Gupta <vgupta@synopsys.com>2015-10-28 15:20:29 +0100
commit28b4af729fc4f7ee748c4bccb50ba5a6066418eb (patch)
tree8735821f890356b98dbaa2beb249e9349fb64be9 /arch/arc/include
parentARC: mm: HIGHMEM: populate high memory from DT (diff)
downloadlinux-28b4af729fc4f7ee748c4bccb50ba5a6066418eb.tar.xz
linux-28b4af729fc4f7ee748c4bccb50ba5a6066418eb.zip
ARC: mm: PAE40: switch to using phys_addr_t for physical addresses
That way a single flip of phys_addr_t to 64 bit ensures all places dealing with physical addresses get correct data Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include')
-rw-r--r--arch/arc/include/asm/cacheflush.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h
index 0992d3dbcc65..fbe3587c4f36 100644
--- a/arch/arc/include/asm/cacheflush.h
+++ b/arch/arc/include/asm/cacheflush.h
@@ -31,10 +31,10 @@
void flush_cache_all(void);
-void flush_icache_range(unsigned long start, unsigned long end);
-void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len);
-void __inv_icache_page(unsigned long paddr, unsigned long vaddr);
-void __flush_dcache_page(unsigned long paddr, unsigned long vaddr);
+void flush_icache_range(unsigned long kstart, unsigned long kend);
+void __sync_icache_dcache(phys_addr_t paddr, unsigned long vaddr, int len);
+void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr);
+void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr);
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1