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author | Vineet Gupta <vgupta@synopsys.com> | 2017-11-10 21:40:00 +0100 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2017-11-13 23:37:39 +0100 |
commit | f3156851616b4f3cb1d6c567fe46adcfd43ad8f8 (patch) | |
tree | 118a965ecaa09460f54c3de64e247db76d201b7f /arch/arc/kernel/perf_event.c | |
parent | ARCv2: Accomodate HS48 MMUv5 by relaxing MMU ver checking (diff) | |
download | linux-f3156851616b4f3cb1d6c567fe46adcfd43ad8f8.tar.xz linux-f3156851616b4f3cb1d6c567fe46adcfd43ad8f8.zip |
ARCv2: boot log: updates for HS48: dual-issue, ECC, Loop Buffer
Print the hardware support for ECC, Loop Buffer as well as the runtime
enabled status
Note that unlike the existing boot printing, this one is not read from
pre-decoded hardware capabilty info cached in cpuinfo[] struct.
Instead we read the AUX regs on the spot and print it, without botherign
to save anywhere.
There is no point in saving static hardware capabilites in memory when
its use is very sporadic and non-performance critical, mainly for
/proc/cpuinfo. This gets worse in SMP, given it is per-cpu, and pretty
much exactly same across all cpus. So only info needed at runtime
(e.g. TLB geometry) needs to be cached in cpuinfo[]. So going fwd
we will start converting code to this paradigm.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/kernel/perf_event.c')
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