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| author | Vineet Gupta <vgupta@synopsys.com> | 2014-12-24 14:11:55 +0100 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2015-06-22 10:36:57 +0200 |
| commit | 72d72880612705143ad32cf4ede0d6ae27e8b975 (patch) | |
| tree | 6c6c27f15e796e3addb8702f29e2dfbccc7a58ee /arch/arc/kernel | |
| parent | ARCv2: SMP: ARConnect debug/robustness (diff) | |
| download | linux-72d72880612705143ad32cf4ede0d6ae27e8b975.tar.xz linux-72d72880612705143ad32cf4ede0d6ae27e8b975.zip | |
ARCv2: SMP: clocksource: Enable Global Real Time counter
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/arc/kernel/mcip.c | 3 | ||||
| -rw-r--r-- | arch/arc/kernel/time.c | 45 |
2 files changed, 48 insertions, 0 deletions
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c index 35921c3ab394..ad7e90b97f6e 100644 --- a/arch/arc/kernel/mcip.c +++ b/arch/arc/kernel/mcip.c @@ -154,4 +154,7 @@ void mcip_init_early_smp(void) __mcip_cmd_data(CMD_DEBUG_SET_SELECT, 0, 0xf); __mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf); } + + if (IS_ENABLED(CONFIG_ARC_HAS_GRTC) && !mp.grtc) + panic("kernel trying to use non-existent GRTC\n"); } diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c index da495478a40b..3364d2bbc515 100644 --- a/arch/arc/kernel/time.c +++ b/arch/arc/kernel/time.c @@ -45,6 +45,8 @@ #include <asm/clk.h> #include <asm/mach_desc.h> +#include <asm/mcip.h> + /* Timer related Aux registers */ #define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */ #define ARC_REG_TIMER0_CTRL 0x22 /* timer 0 control */ @@ -60,6 +62,48 @@ /********** Clock Source Device *********/ +#ifdef CONFIG_ARC_HAS_GRTC + +static int arc_counter_setup(void) +{ + return 1; +} + +static cycle_t arc_counter_read(struct clocksource *cs) +{ + unsigned long flags; + union { +#ifdef CONFIG_CPU_BIG_ENDIAN + struct { u32 h, l; }; +#else + struct { u32 l, h; }; +#endif + cycle_t full; + } stamp; + + local_irq_save(flags); + + __mcip_cmd(CMD_GRTC_READ_LO, 0); + stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK); + + __mcip_cmd(CMD_GRTC_READ_HI, 0); + stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK); + + local_irq_restore(flags); + + return stamp.full; +} + +static struct clocksource arc_counter = { + .name = "ARConnect GRTC", + .rating = 400, + .read = arc_counter_read, + .mask = CLOCKSOURCE_MASK(64), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +#else + #ifdef CONFIG_ARC_HAS_RTC #define AUX_RTC_CTRL 0x103 @@ -135,6 +179,7 @@ static struct clocksource arc_counter = { }; #endif +#endif /********** Clock Event Device *********/ |