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author | Al Viro <viro@zeniv.linux.org.uk> | 2016-07-01 05:34:49 +0200 |
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committer | Al Viro <viro@zeniv.linux.org.uk> | 2016-07-01 05:34:49 +0200 |
commit | b223f4e215b32849b841e750e83a915b670070f5 (patch) | |
tree | 75340f6305028de331a17255018869822b3886d2 /arch/arc/mm/dma.c | |
parent | Remove last traces of ->sync_page (diff) | |
parent | vfs: clean up documentation (diff) | |
download | linux-b223f4e215b32849b841e750e83a915b670070f5.tar.xz linux-b223f4e215b32849b841e750e83a915b670070f5.zip |
Merge branch 'd_real' of git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs into work.misc
Diffstat (limited to 'arch/arc/mm/dma.c')
-rw-r--r-- | arch/arc/mm/dma.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c index 8c8e36fa5659..73d7e4c75b7d 100644 --- a/arch/arc/mm/dma.c +++ b/arch/arc/mm/dma.c @@ -10,7 +10,7 @@ * DMA Coherent API Notes * * I/O is inherently non-coherent on ARC. So a coherent DMA buffer is - * implemented by accessintg it using a kernel virtual address, with + * implemented by accessing it using a kernel virtual address, with * Cache bit off in the TLB entry. * * The default DMA address == Phy address which is 0x8000_0000 based. |