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| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2019-07-22 11:31:45 +0200 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2019-08-05 15:55:57 +0200 |
| commit | ce0eff0d9b4d37702df48a39e3fddb5e39b2c25b (patch) | |
| tree | 554bc668062d026f833cde12eabc58f386721faa /arch/arc/mm | |
| parent | ARC: fix typo in setup_dma_ops log message (diff) | |
| download | linux-ce0eff0d9b4d37702df48a39e3fddb5e39b2c25b.tar.xz linux-ce0eff0d9b4d37702df48a39e3fddb5e39b2c25b.zip | |
ARC: [plat-hsdk]: allow to switch between AXI DMAC port configurations
We want to use DW AXI DMAC on HSDK board in our automated verification
to test cache & dma kernel code changes. This is perfect candidate
as we don't depend on any external peripherals like MMC card / USB
storage / etc.
To increase test coverage we want to test both options:
* DW AXI DMAC is connected through IOC port & dma direct ops used
* DW AXI DMAC is connected to DDR port & dma noncoherent ops used
Introduce 'arc_hsdk_axi_dmac_coherent' global variable which can be
modified by debugger (same way as we patch 'ioc_enable') to switch
between these options without recompiling the kernel.
Depend on this value we tweak memory bridge configuration and
"dma-coherent" DTS property of DW AXI DMAC.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/mm')
0 files changed, 0 insertions, 0 deletions