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| author | Vineet Gupta <vgupta@synopsys.com> | 2015-02-27 15:06:35 +0100 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2015-10-17 14:18:21 +0200 |
| commit | 722fe8fd365a08bd53e9dd105009ab810107b02d (patch) | |
| tree | 4077fb1d215b61bc53e3b5a5a34ea584c92ceac3 /arch/arc | |
| parent | mm,thp: introduce flush_pmd_tlb_range (diff) | |
| download | linux-722fe8fd365a08bd53e9dd105009ab810107b02d.tar.xz linux-722fe8fd365a08bd53e9dd105009ab810107b02d.zip | |
ARCv2: mm: THP: Implement flush_pmd_tlb_range() optimization
Implement the TLB flush routine to evict a sepcific Super TLB entry,
vs. moving to a new ASID on every such flush.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc')
| -rw-r--r-- | arch/arc/include/asm/hugepage.h | 4 | ||||
| -rw-r--r-- | arch/arc/mm/tlb.c | 20 |
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arc/include/asm/hugepage.h b/arch/arc/include/asm/hugepage.h index 1d0700c32b82..c5094de86403 100644 --- a/arch/arc/include/asm/hugepage.h +++ b/arch/arc/include/asm/hugepage.h @@ -74,4 +74,8 @@ extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, #define __HAVE_ARCH_PGTABLE_WITHDRAW extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); +#define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE +extern void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end); + #endif diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c index 91905b1c3d72..005090e425f4 100644 --- a/arch/arc/mm/tlb.c +++ b/arch/arc/mm/tlb.c @@ -659,6 +659,26 @@ pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp) return pgtable; } +void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end) +{ + unsigned int cpu; + unsigned long flags; + + local_irq_save(flags); + + cpu = smp_processor_id(); + + if (likely(asid_mm(vma->vm_mm, cpu) != MM_CTXT_NO_ASID)) { + unsigned int asid = hw_pid(vma->vm_mm, cpu); + + /* No need to loop here: this will always be for 1 Huge Page */ + tlb_entry_erase(start | _PAGE_HW_SZ | asid); + } + + local_irq_restore(flags); +} + #endif /* Read the Cache Build Confuration Registers, Decode them and save into |