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authorOlof Johansson <olof@lixom.net>2013-01-28 08:03:42 +0100
committerOlof Johansson <olof@lixom.net>2013-01-28 08:03:42 +0100
commitaf70fdc947dbe835acc26c6ee9e8e930f38935f8 (patch)
tree9924e9f2732e3cf3c7a882cb11377247729891ab /arch/arm/Kconfig.debug
parentMerge branch 'depends/cleanup' into next/soc (diff)
parentARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco (diff)
downloadlinux-af70fdc947dbe835acc26c6ee9e8e930f38935f8.tar.xz
linux-af70fdc947dbe835acc26c6ee9e8e930f38935f8.zip
Merge branch 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel into next/soc
From Barry Song, this adds support for a new SoC from CSR; marco. It's SMP, uses GIC instead of VIC and in general needs a bit of rework of the platform code for setup, which this branch contains. * 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel: ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco ARM: PRIMA2: rtciobg: it is also compatible with marco ARM: PRIMA2: rstc: enable the support for Marco ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco ARM: PRIMA2: initialize l2x0 according to mach from DT ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig ARM: PRIMA2: add CSR SiRFmarco device tree .dts Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/Kconfig.debug')
-rw-r--r--arch/arm/Kconfig.debug14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index bbb0a670cd1a..af3987cb9e4d 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -386,6 +386,20 @@ choice
Say Y here if you want kernel low-level debugging support
on Tegra based platforms.
+ config DEBUG_SIRFPRIMA2_UART1
+ bool "Kernel low-level debugging messages via SiRFprimaII UART1"
+ depends on ARCH_PRIMA2
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to the uart1 port on SiRFprimaII devices.
+
+ config DEBUG_SIRFMARCO_UART1
+ bool "Kernel low-level debugging messages via SiRFmarco UART1"
+ depends on ARCH_MARCO
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to the uart1 port on SiRFmarco devices.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU