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authorTony Lindgren <tony@atomide.com>2011-03-03 02:07:14 +0100
committerTony Lindgren <tony@atomide.com>2011-03-03 02:07:14 +0100
commit12d7d4e0ed8fecf7f74c89483b55b300be6e5901 (patch)
treef573761ac752ff04ec445e23aef50adadda49790 /arch/arm/Kconfig
parentomap: omap3evm: add support for the WL12xx WLAN module to the omap3evm (diff)
parentarm: omap: fix section mismatch warning (diff)
downloadlinux-12d7d4e0ed8fecf7f74c89483b55b300be6e5901.tar.xz
linux-12d7d4e0ed8fecf7f74c89483b55b300be6e5901.zip
Merge branch 'devel-cleanup' into omap-for-linus
Conflicts: arch/arm/mach-omap2/timer-gp.c
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 26d45e5b636b..166efa2a19cd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1177,6 +1177,31 @@ config ARM_ERRATA_743622
visible impact on the overall performance or power consumption of the
processor.
+config ARM_ERRATA_751472
+ bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
+ depends on CPU_V7 && SMP
+ help
+ This option enables the workaround for the 751472 Cortex-A9 (prior
+ to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
+ completion of a following broadcasted operation if the second
+ operation is received by a CPU before the ICIALLUIS has completed,
+ potentially leading to corrupted entries in the cache or TLB.
+
+config ARM_ERRATA_753970
+ bool "ARM errata: cache sync operation may be faulty"
+ depends on CACHE_PL310
+ help
+ This option enables the workaround for the 753970 PL310 (r3p0) erratum.
+
+ Under some condition the effect of cache sync operation on
+ the store buffer still remains when the operation completes.
+ This means that the store buffer is always asked to drain and
+ this prevents it from merging any further writes. The workaround
+ is to replace the normal offset of cache sync operation (0x730)
+ by another offset targeting an unmapped PL310 register 0x740.
+ This has the same effect as the cache sync operation: store buffer
+ drain and waiting for all buffers empty.
+
endmenu
source "arch/arm/common/Kconfig"