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author | Ard Biesheuvel <ardb@kernel.org> | 2020-02-18 16:50:54 +0100 |
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committer | Ard Biesheuvel <ardb@kernel.org> | 2020-02-27 11:15:35 +0100 |
commit | e114412f616446708b3d1e559ff4af9db7ade46e (patch) | |
tree | 2a0b4e63c0e999f967eb96f3198c926816c7a996 /arch/arm/boot/compressed/head.S | |
parent | ARM: decompressor: factor out routine to obtain the inflated image size (diff) | |
download | linux-e114412f616446708b3d1e559ff4af9db7ade46e.tar.xz linux-e114412f616446708b3d1e559ff4af9db7ade46e.zip |
ARM: decompressor: prepare cache_clean_flush for doing by-VA maintenance
In preparation for turning the decompressor's cache clean/flush
operations into proper by-VA maintenance for v7 cores, pass the
start and end addresses of the regions that need cache maintenance
into cache_clean_flush in registers r0 and r1.
Currently, all implementations of cache_clean_flush ignore these
values, so no functional change is expected as a result of this
patch.
Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Diffstat (limited to 'arch/arm/boot/compressed/head.S')
-rw-r--r-- | arch/arm/boot/compressed/head.S | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index d45952aae2b5..f90034151aef 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -528,6 +528,8 @@ dtb_check_done: /* Preserve offset to relocated code. */ sub r6, r9, r6 + mov r0, r9 @ start of relocated zImage + add r1, sp, r6 @ end of relocated zImage #ifndef CONFIG_ZBOOT_ROM /* cache_clean_flush may use the stack, so relocate it */ add sp, sp, r6 @@ -629,6 +631,11 @@ not_relocated: mov r0, #0 add r2, sp, #0x10000 @ 64k max mov r3, r7 bl decompress_kernel + + get_inflated_image_size r1, r2, r3 + + mov r0, r4 @ start of inflated image + add r1, r1, r0 @ end of inflated image bl cache_clean_flush bl cache_off @@ -1182,6 +1189,9 @@ __armv7_mmu_cache_off: /* * Clean and flush the cache to maintain consistency. * + * On entry, + * r0 = start address + * r1 = end address (exclusive) * On exit, * r1, r2, r3, r9, r10, r11, r12 corrupted * This routine must preserve: |