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| author | Nicolas Pitre <nicolas.pitre@linaro.org> | 2011-06-09 06:05:27 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-06-09 11:15:06 +0200 |
| commit | 720c60e1943a06cfd9472ad5a9967dec304e4394 (patch) | |
| tree | a1636063dc351feb1695644c6c86266b4853f9e2 /arch/arm/boot/compressed | |
| parent | ARM: 6953/1: DT: don't try to access physical address zero (diff) | |
| download | linux-720c60e1943a06cfd9472ad5a9967dec304e4394.tar.xz linux-720c60e1943a06cfd9472ad5a9967dec304e4394.zip | |
ARM: 6954/1: zImage: fix Thumb2 breakage
Commit af3e4fd37a "ARM: 6859/1: Add writethrough dcache support for
ARM926EJS processor" broke Thumb2 compilation by omitting to maintain
the wide encoding for the added branch instructions which made the
ARM926EJ-S record smaller than expected, breaking the record walk code.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/boot/compressed')
| -rw-r--r-- | arch/arm/boot/compressed/head.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index f9da41921c52..942fad97e447 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -691,9 +691,9 @@ proc_types: .word 0x41069260 @ ARM926EJ-S (v5TEJ) .word 0xff0ffff0 - b __arm926ejs_mmu_cache_on - b __armv4_mmu_cache_off - b __armv5tej_mmu_cache_flush + W(b) __arm926ejs_mmu_cache_on + W(b) __armv4_mmu_cache_off + W(b) __armv5tej_mmu_cache_flush .word 0x00007000 @ ARM7 IDs .word 0x0000f000 |