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author | Oscar A Perez <linux@neuralgames.com> | 2019-05-01 15:26:43 +0200 |
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committer | Joel Stanley <joel@jms.id.au> | 2019-09-05 02:34:34 +0200 |
commit | 89b97c429e2e77d695b5133572ca12ec256a4ea4 (patch) | |
tree | 535e1a0f590d011a97b8eafbcc006b6a4301fb4d /arch/arm/boot/dts/Makefile | |
parent | ARM; dts: aspeed: mihawk: File should not be executable (diff) | |
download | linux-89b97c429e2e77d695b5133572ca12ec256a4ea4.tar.xz linux-89b97c429e2e77d695b5133572ca12ec256a4ea4.zip |
ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
According to the AST2500/AST2520 specs, these SoCs support up to 228 GPIO
pins. However, 'gpio-ranges' value in 'aspeed-g5.dtsi' file is currently
setting the upper limit to 220 which isn't allowing access to all their
GPIOs. The correct upper limit value is 232 (actual number is 228 plus a
4-GPIO hole in GPIOAB). Without this patch, GPIOs AC5 and AC6 do not work
correctly on a AST2500 BMC running Linux Kernel v4.19
Fixes: 2039f90d136c ("ARM: dts: aspeed-g5: Add gpio controller to devicetree")
Signed-off-by: Oscar A Perez <linux@neuralgames.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/Makefile')
0 files changed, 0 insertions, 0 deletions