diff options
| author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2013-10-07 17:38:41 +0200 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@altera.com> | 2013-10-09 23:56:24 +0200 |
| commit | 071fb4cbe01cb418264143cf49612a8d23cfaf4e (patch) | |
| tree | f7d6b0af63dcee5061bfe4de52fe45b93b91fa65 /arch/arm/boot/dts/Makefile | |
| parent | arm: socfpga: Add clock for smp_twd timer (diff) | |
| download | linux-071fb4cbe01cb418264143cf49612a8d23cfaf4e.tar.xz linux-071fb4cbe01cb418264143cf49612a8d23cfaf4e.zip | |
ARM: socfpga: dts: Move common nodes to cyclone5 dtsi
The current socfpga_cyclone5.dts describes the Altera Cyclone5 SoC Development
Kit. The Cyclone5 includes a SoCFPGA, which itself can be included in other
SoC+FPGA combinations.
Instead of having to describe all Cyclone5 common nodes in every board specific
dts, move socfpga_cyclone5.dts to a dtsi and include this in a new dts for the
Development Kit.
[Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Diffstat (limited to 'arch/arm/boot/dts/Makefile')
| -rw-r--r-- | arch/arm/boot/dts/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e95af3f5433b..430ba19b2f87 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -211,7 +211,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ r8a73a4-ape6evm-reference.dtb \ sh7372-mackerel.dtb dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb -dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \ +dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_socdk.dtb \ socfpga_vt.dtb dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ spear1340-evb.dtb |