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| author | Tony Lindgren <tony@atomide.com> | 2023-05-17 11:25:03 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2023-05-23 09:59:45 +0200 |
| commit | d73ab823ee9c2bba919eaffc8cc6bb7d71222c17 (patch) | |
| tree | 45fb76908e6e7f89f75db731d101057a817abe49 /arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi | |
| parent | ARM: dts: Unify pinctrl-single pin group nodes for ti81xx (diff) | |
| download | linux-d73ab823ee9c2bba919eaffc8cc6bb7d71222c17.tar.xz linux-d73ab823ee9c2bba919eaffc8cc6bb7d71222c17.zip | |
ARM: dts: Unify pinctrl-single pin group nodes for am33xx
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi b/arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi index f9b7e774ac48..a138eb356874 100644 --- a/arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi +++ b/arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi @@ -4,7 +4,7 @@ */ &am33xx_pinmux { - cpsw_default: cpsw_default { + cpsw_default: cpsw-default-pins { pinctrl-single,pins = < /* Slave 1 */ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ @@ -22,7 +22,7 @@ >; }; - cpsw_sleep: cpsw_sleep { + cpsw_sleep: cpsw-sleep-pins { pinctrl-single,pins = < /* Slave 1 reset value */ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) @@ -40,7 +40,7 @@ >; }; - usb_hub_ctrl: usb_hub_ctrl { + usb_hub_ctrl: usb-hub-ctrl-pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */ >; |